K 10
svn:author
V 3
pst
K 8
svn:date
V 27
1995-09-16T21:31:55.000000Z
K 7
svn:log
V 435
Our existing Cyrix cache-disable code was short-cutting the steps for
setting the control register.  Make the read and write operations two
completely separate steps.

While we're at it, pull in the whole set of Cyrix cache control options
from NetBSD-current,  since a few motherboards do the right thing with
the Cyrix chip.

There is no option to disable the internal cache completely (yet).

Reviewed by:	pst
Obtained from:	NetBSD

END