K 10
svn:author
V 3
jhb
K 8
svn:date
V 27
2004-11-11T22:42:25.000000Z
K 7
svn:log
V 398
- Place the gcc memory barrier hint in the right place in the 80386 version
  of atomic_store_rel().
- Use the 80386 versions of atomic_load_acq() and atomic_store_rel() that
  do not use serializing instructions on all UP kernels since a UP machine
  does need to synchronize with other CPUs.  This trims lots of cycles from
  spin locks on UP kernels among other things.

Benchmarked by:	rwatson

END