K 10
svn:author
V 6
obrien
K 8
svn:date
V 27
2005-02-27T21:36:33.000000Z
K 7
svn:log
V 166
MFC: rev 1.17: If mixed mode is not enabled by the APIC enumerator, don't
assume that pin 0 on the first I/O APIC is an ExtINT pin.  Instead, assume
it is ISA IRQ 0.

END