K 10
svn:author
V 7
glebius
K 8
svn:date
V 27
2005-12-08T14:06:12.000000Z
K 7
svn:log
V 153
MFC 1.91:
  On the 82571 and newer chipset the ICR register is meaningful only
  if the E1000_ICR_INT_ASSERTED bit is set.

  Submitted by:   Jack Vogel

END