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Forced commit to add more comment to:

1.583  src/sys/amd64/amd64/pmap.c
1.588  src/sys/i386/i386/pmap.c

Invalidate all TLBs and page structure caches that may reference a page
for page walk acceleration before releasing it to the free list.

This is required for CPUs implementing page structure caches as described
in the Intel application note:
	"TLBs, Paging-Structure Caches, and Their Invalidation"
	 (Document Number: 317080-001)

Reviewed by:    Siddha Suresh (Intel), alc@, peter@

END