K 10
svn:author
V 6
marcel
K 8
svn:date
V 27
2008-02-14T18:46:50.000000Z
K 7
svn:log
V 244
On Montecito processors, the instruction cache is in fact not
coherent with the data caches. Implement a quick fix to allow
us to boot on Montecito, while I'm working on a better fix in
the mean time.

Commit made on Montecito-based Itanium...

END