K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2008-03-18T08:39:11.000000Z
K 7
svn:log
V 417
Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit
2's compliment.

The 2's compliment transform is done so a "count down" sampling interval
can be converted into a "count up" PMC value. a 2's complimented 'count down'
value is written to the PMC counter; then the read-back counter is reverted
via another 2's compliment.

PR: kern/121660
Reviewed by: jkoshy
Approved by: jkoshy
MFC after: 1 week

END