K 10
svn:author
V 3
jhb
K 8
svn:date
V 27
2008-09-10T18:06:08.197484Z
K 7
svn:log
V 507
Some K8 chipsets don't expose all of the PCI devices on bus 0 via PCIe
memory-mapped config access.  Add a workaround for these systems by
checking the first function of each slot on bus 0 using both the
memory-mapped config access and the older type 1 I/O port config access.
If we find a slot that is only visible via the type 1 I/O port config
access, we flag that slot.  Future PCI config transactions to flagged
slots on bus 0 use type 1 I/O port config access rather than memory mapped
config access.

END