K 10
svn:author
V 3
raj
K 8
svn:date
V 27
2008-10-13T18:59:59.441612Z
K 7
svn:log
V 194
Provide L2 cache synchronization (write back + invalidation) on ARM.

Note the cpu_l2cache_wbinv_* routines are no-ops on systems not populated with
L2 caches.

Obtained from:	Marvell, Semihalf

END