K 10
svn:author
V 3
mav
K 8
svn:date
V 27
2008-11-30T00:11:48.292822Z
K 7
svn:log
V 233
According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.

END