K 10
svn:author
V 3
raj
K 8
svn:date
V 27
2009-01-08T13:20:28.637023Z
K 7
svn:log
V 320
Adjust Marvell SOC support for A0 chip revision.

- Clean up TCLK handling so that it's dynamically recognized depending on
  registers settings or chip version/revision. Update registers definitions.

- Teach SOC ident routine about A0 (initial silicon version for general
  audience)

Obtained from:	Marvell, Semihalf

END