K 10
svn:author
V 3
raj
K 8
svn:date
V 27
2009-01-09T10:45:04.446329Z
K 7
svn:log
V 374
Fix confusing naming of Marvell ARM CPU specific routines.

- The contents of 'feroceon_cpufuncs' dispatch table was really dedicated for the
  new Sheeva CPU (in 88F6xxx and MV-78xxx SOCs), and NOT Feroceon.

- Feroceon CPU (in 88F5xxx SOCs) appears as a regular ARM926EJ-S core and does
  not require dedicated routines.

This will be accompanied by a file rename commit.

END