K 10
svn:author
V 7
yongari
K 8
svn:date
V 27
2009-03-31T03:29:05.586205Z
K 7
svn:log
V 320
Partial revert r185756.
It seems that RTL8168D and RTL8102EL requires additional settle
time to complete RL_PHYAR register write. Accessing RL_PHYAR
register right after the write causes errors for subsequent PHY
register accesses.

Tested by:	george at luckytele dot com,
		Steve Wills < STEVE at stevenwills dot com >

END