K 10
svn:author
V 7
yongari
K 8
svn:date
V 27
2009-12-21T18:34:18.885436Z
K 7
svn:log
V 571
MFC r199558,199561
r199558:
  Use bus_{read,write}_4 rather than bus_space_{read,write}_4.
r199561:
  Use capability pointer to access PCIe registers rather than
  directly access them at fixed address. Frequently the register
  offset could be changed if additional PCI capabilities are added to
  controller.
  One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe
  link capabilities register but the location of the register does
  not match with PCIe capability pointer + offset. I'm not sure it's
  shadow register of PCIe link capabilities register.

END