K 10
svn:author
V 6
marcel
K 8
svn:date
V 27
2010-03-23T19:30:56.099726Z
K 7
svn:log
V 389
Enable power management for E500 cores. Use "doze" for now to make
sure the caches remain coherent. For single-core configurations and
with busdma changes we could eventually switch to "nap" and force
a D-cache invalidation as part of the DMA completion. To this end,
clear PSL_WE until after we handled the decrementer or external
interrupt as it tells us whether we just woke up or not.

END