K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2011-05-07T13:08:48.556557Z
K 7
svn:log
V 316
Update the ext channel cycpwr threshold 1 register for the extension
channel when the channel is HT/40.

The new ANI code (primarily for the AR9300/AR9400) in ath9k sets this
register but the ANI code for the previous 11n chips didn't set this.

Unlike ath9k, only set this for HT/40 channels.

Obtained From:	ath9k

END