K 10
svn:author
V 6
marcel
K 8
svn:date
V 27
2011-07-04T19:51:26.167129Z
K 7
svn:log
V 1220
o  Implement LowerFormalArguments() LowerReturn() using CallingConv and
   for general registers only.
o  Implement IA64InstrInfo::copyPhysReg() for general registers. This
   is needed during lowering and before copy elimination.
o  Move IA instruction definitions from IA64.td to IA64InstrFormat.td and
   IA64InstrInfo.td. Add the register form of the add instruction and add
   the branch return instruction.
o  Rename register classes to something a lot shorter: BR instead of Branch,
   etc.
o  Define branch registers properly. THis includes their DWARF register
   numbers. Flesh out the general registers in a similar manner.
o  Add the target-specific RET_FLAG SDNode type, that's used to represent
   function returns.
o  Implement IA64MCInstLower::Lower() for general registers, so that we
   can lower add instructions to machine code.

Given that the assemblerwriter is based on machine code, this means that
we can properly compile:
	long
	add(long x, long y)
	{
		return (x + y);
	}

into:
	        .file   "add.c"
	        .text
	        .global add
	        .align  32
	        .type   add,@function
	add:
	        add     r8=r33,r32
	        br.ret.sptk     rp
	.tmp0:
	        .size   add, .tmp0-add

END