K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2011-10-13T08:36:11.138687Z
K 7
svn:log
V 815
Add in some _very dirty_ stuff to get the mips24k performance counter
stuff working in interrupt mode.

This is very _very_ local and mustn't be merged into -HEAD.

If the relevant bit is set in the APB misc interrupt word, an interrupt
is generated (APB IRQ 5) on each performance counter event.

This at least generates sampling events but it's:

* absolutely wrong looking;
* since callchains aren't implemented, any testing _must_ involve
  disabling callchain events (pmcstat -N) or things will crash.

The mips24k spec sets a specific bit in the trap cause register
whenever a performance counter event occurs. But since I'm not yet
sure whether we should just use that or the irq (or how to do
mips24k specific stuff in the general mips trap frame handling code),
I'll just abuse the interrupt code for now.

END