K 10
svn:author
V 8
jchandra
K 8
svn:date
V 27
2012-03-24T10:19:40.917231Z
K 7
svn:log
V 594
Update memory and resource allocation code for SoC devices

The XLP on-chip devices have PCI headers, but some devices will
need custom resource allocation code.
- devices with no MEM/IO BARs with registers in PCIe extended reg
  space have to be handled in resource allocation
- devices without INTPIN/INTLINE in PCI header can be supported
  by having these faked with a shadow register.
- Some devices does not allow 8/16 bit access to the register space.

Subclass pci and override attach and resource allocation methods to
take care of this.

Remove earlier code which did this partially.

END