K 10
svn:author
V 5
jceel
K 8
svn:date
V 27
2012-06-12T01:13:59.528146Z
K 7
svn:log
V 444
Refactored interrupt routing mechanism. Uses NEWBUS interface
pic_if.m similar to powerpc implementation. It's organized in
hierarchy where top-level interrupt controller is ARM core
itself serving one IRQ. SoC interrupt controllers can bind
handlers to this IRQ and provide more multiplexed IRQs to
children.

Example implementation includes LPC3250 interrupt controller
(lpc_intc.c).

It's not bug-free, but tested on LPC3250 (arm/lpc) port.

END