K 10
svn:author
V 5
gonzo
K 8
svn:date
V 27
2012-08-22T22:48:50.404066Z
K 7
svn:log
V 642
Do not change "cachable" attribute for DMA memory allocated with
BUS_DMA_COHERENT attribute

The minimum unit for changing "cachable" attribute is page, so call
to pmap_change_attr effectively disable cache for all pages that newly
allocated DMA memory region spans on. The problem is that general-purpose
memory could reside on these pages too and disabling cache might affect
performance. Moreover ldrex/strex operators raise Data Abort exception
when accessing memory on page with "cachable" attribute off.

BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests
to do best effort for reducing synchronization overhead.

END