K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2012-08-26T04:39:20.083530Z
K 7
svn:log
V 323
Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registers
are written out.

This allows EEPROM-less NICs on the AR7241 PCIe bus to be correctly
initialised.

Tested:

* AP91 (AR7240+AR9285) - the existing board support didn't break;
* AP99 (AR7241+AR9287) - this fixed the configuration of the AR9287 PCI.

END