K 10
svn:author
V 3
jhb
K 8
svn:date
V 27
2012-08-29T19:34:46.102819Z
K 7
svn:log
V 500
MFC 238123,238167:
- Add support for the 'xsave', 'xrstor', 'xsaveopt', 'xgetbv', and 'xsetbv'
  instructions.  I reimplemented this from scratch based on the Intel
  manuals and the existing support for handling the fxsave and fxrstor
  instructions.
- Add support for the 'invept' and 'invvpid' instructions.  Beyond simply
  adding appropriate table entries, the assembler had to be adjusted as
  these are the first non-SSE instructions to use a 3-byte opcode (and a
  mandatory prefix to boot).

END