K 10
svn:author
V 4
neel
K 8
svn:date
V 27
2013-10-01T02:33:30.560210Z
K 7
svn:log
V 1239
Implement the accessed/dirty bit emulation differently so that the code to
deal with regular and emulated pmaps is almost identical.

The idea is entirely from Alan Cox (alc@).

EPT mappings that require emulation of A/D bits will map the PG_V and PG_RW
bits to bits 52 and 53 in the PTE. These bits are entirely used by software
and ignored by the hardware.

The accessed bit (PG_A) is mapped to the EPT_PG_READ bit and the modified
bit (PG_M) is mapped to the EPT_PG_WRITE bit.

Thus the pmap code creates valid mappings by setting the PG_V and/or the
PG_RW bits in the PTE and the emulation handler actually makes these mappings
visible to the hardware by setting the EPT_PG_READ and/or the EPT_PG_WRITE
bits.

The pmap code that clears the referenced bit needs special attention because
if PG_A is being emulated it ends up clearing EPT_PG_READ. The EPT requires
that if the EPT_PG_READ bit is clear then the EPT_PG_WRITE bit must also be
cleared. These restrictions are expressed in 'safe_to_clear_referenced()'.

The accessed/dirty bit handler now needs to deal with read faults as well
as write faults. The accessed bit emulation is done for 4K and 2M pages
whereas the dirty bit emulation is done for 4K pages.

Suggested by:	alc@

END