K 10
svn:author
V 3
mav
K 8
svn:date
V 27
2013-10-12T18:24:52.619868Z
K 7
svn:log
V 669
Set of optimizations for ahci(4), respecting CAM improvements:
 - Add tunable hint.ahci.X.direct to control when to use direct request
completion and when prefer to use CAM threads.  Set default based on number
of supported MSI vectors and implemented ports.
 - Move heavy AHCI_P_IS read out of the lock to reduce its scope.  This
reduces lock congestion spinning under high IOPS from 10% to almost zero.
 - Create several optimized interrupt handlers for different configurations
to avoid unneeded branching there at run time.

At this point I can totally max out 6 SSDs on ICH10 AHCI doing 640K IOPS,
while having only 30% of CPU load on 2x6x2 CPU Xeon E5645 system.

END