K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2013-10-16T02:46:00.964501Z
K 7
svn:log
V 321
Add in a write barrier after each if_arge write.

Without correct barriers, this code just plain doesn't work on the
mips74k cores (specifically the AR9344.)

In particular, the MDIO register accesses need this barriering or MII bus
access results in out-of-order garbage.

Tested:

* AR9344 (mips74k)
* AR9331 (mips24k)

END