K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2014-02-24T01:41:58.030441Z
K 7
svn:log
V 308
Add a new cache maintenance function, idcache_inv_all, to the table, and
implementations for each of the chips we support.  Most chips up through
armv6 can use the armv4 implementation which has a single coprocessor
opcode for this operation.  The rather more complex armv7 implementation
comes from netbsd.

END