K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2014-04-27T23:31:42.922791Z
K 7
svn:log
V 254
Do a read-after-write to ensure the interrupt register update is flushed
to the hardware.

The QCA HAL has a comment noting that if this isn't done, modifications
to AR_IMR_S2 before AR_IMR is flushed may produce spurious interrupts.

Obtained from:	QCA

END