K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2014-05-17T21:07:54.942302Z
K 7
svn:log
V 740
MFC 264128, 264129, 264130, 264135,

  Fix TTB set operation for armv7. Perform sychronization (by "isb" barrier)
  after TTB is set.

  Fix TLB maintenance issues for armv6 and armv7.

    - Add cpu_cpwait to comply with the convention.
    - Add missing TLB invalidations, especially in pmap_kenter & pmap_kremove
      with distinguishing between D and ID pages.
    - Modify pmap init/bootstrap invalidations to ID, just to be safe.
    - Fix TLB-inv and PTE_SYNC ordering.

  Allocate per-cpu resources for doing pmap_zero_page() and pmap_copy_page().
  This is performance enhancement rather than bugfix.

  We don't support any ARM systems with an ISA bus and don't need a freelist
  of memory to support ISA addressing limitations.

END