K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2014-05-17T23:03:04.346537Z
K 7
svn:log
V 332
MFC 265023, 265024, 265036:

  There is no difference between IPI_STOP and IPI_STOP_HARD on ARM, so
  map them both to the same interrupt number like other arches do.

  Flush and invalidate caches on each CPU as part of handling IPI_STOP.

  Don't use multiprocessing-extensions instruction on processors that don't
  support SMP.

END