K 10
svn:author
V 6
tychon
K 8
svn:date
V 27
2014-06-06T16:18:37.527036Z
K 7
svn:log
V 234
Some devices (e.g. Intel AHCI and NICs) support quad-word access to
register pairs where two 32-bit registers make up a larger logical
size.  Support those access by splitting the quad-word into two
double-words.

Reviewed by:	grehan

END