K 10 svn:author V 2 bz K 8 svn:date V 27 2014-08-16T14:21:03.289014Z K 7 svn:log V 346 MFC r263632: For BERI on NetFPGA assume HZ=100 by default. Remove the uart support in favour of a "jtag-uart" interface imitation providing a much simpler interface, directly exported to the host, allowing the toolchain to be shared with BERI on Altera. [1] Submitted by: Jong Hun HAN (jong.han cl.cam.ac.uk) [1] Sponsored by: DARPA/AFRL END