K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2014-12-27T01:28:52.039170Z
K 7
svn:log
V 689
MFC r274538, r274545, r274596, r274602, r274603, r274604, r274605, r274839:

  When doing busdma sync ops for BUSDMA_COHERENT memory, there is no need
  for cache maintenance operations, but ensure that all prior writes have
  reached memory when doing a PREWRITE sync.

  Do not do a cache invalidate on a PREREAD sync that is also a PREWRITE sync.

  Do the cache invalidate sequence from the outermost to innermost, required
  for correct operation.

  Correct the sequence of busdma sync ops involved with PRE/POSTREAD syncs.

  When doing a PREREAD sync of an mbuf-type dma buffer, do a writeback of
  the first cacheline if the buffer start address is not on a cacheline
  boundary.

END