K 10 svn:author V 3 jhb K 8 svn:date V 27 2015-01-29T20:41:42.667753Z K 7 svn:log V 318 Opt for performance over power-saving on Intel CPUs that have a P-state but not C-state invariant TSC by changing the default behavior to leaving the TSC enabled as the timecounter and disabling C2+ instead of disabling the TSC by default. Discussed with: jkim Tested by: Jan Kokemuller END