K 10
svn:author
V 6
andrew
K 8
svn:date
V 27
2015-04-11T17:16:23.400171Z
K 7
svn:log
V 413
Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.

This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.

MFC after:	1 week

END