K 10
svn:author
V 4
neel
K 8
svn:date
V 27
2015-05-06T05:12:29.575997Z
K 7
svn:log
V 149
Add macros for AMD-specific bits in MSR_EFER: LMSLE, FFXSR and TCE.

AMDID_FFXSR is at bit 25 so correct its value to 0x02000000.

MFC after:	1 week

END