K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2015-11-21T23:30:47.336879Z
K 7
svn:log
V 297
Update the imx5/imx6 cpu_reset() implementation based on a new understanding
of the SRS (software reset) bit in the watchdog control register.  Despite
what the manual seems to imply, this bit DOES trigger an immediate reset, as
opposed to simply flagging the type of reset as software-triggered.

END