K 10
svn:author
V 6
adrian
K 8
svn:date
V 27
2016-05-14T23:20:46.628574Z
K 7
svn:log
V 451
[bwn] implement reset improvements in preparation for PHY-N support

* Ensure we set 20MHz wide channels (hard-coded) for PHY-N.
* Change the core rese tto take a flag saying "gmode" vesus uint32_t
  flags.  This is important for BCMA support where the "gmode" bit
  is different.
* Refactor out the mac-phy clock reset routine (usde by PHY-N).

Tested:

* BCM4321 (PHY-N), BCM4312 (PHY-LP)

TODO:

* Checkpoint test on PHY-G hardware, just to check.

END