K 10
svn:author
V 3
jhb
K 8
svn:date
V 27
2016-12-16T01:06:35.603214Z
K 7
svn:log
V 256
MFC 308690: Sync instruction cache's after writing user breakpoints on MIPS.

Add an implementation for pmaps_sync_icache() on MIPS that sync's the
instruction cache on all CPUs via smp_rendezvous() after a debugger
inserts a breakpoint via ptrace(PT_IO).

END