K 10 svn:author V 3 zbb K 8 svn:date V 27 2017-06-21T18:28:37.147869Z K 7 svn:log V 480 Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms This patch disables outer cache sync in PL310 driver by adding "arm,io-coherent" property. In addition to the previous patches it was the last bit needed for enabling proper operation of Armada 38x SoCs with the IO cache coherency. Submitted by: Michal Mazur Obtained from: Semihalf Sponsored by: Stormshield Reviewed by: mmel Differential revision: https://reviews.freebsd.org/D11204 END