K 10
svn:author
V 6
marius
K 8
svn:date
V 27
2017-07-02T19:13:01.769192Z
K 7
svn:log
V 212
Retry up to 20 ms to enable bus power as at least with some Intel
SDHCI/eMMC controllers the first attempt after a D3 to D0 transition,
i. e. when the firmware has put the devices into D3 state before,
can fail.

END