K 10
svn:author
V 6
marius
K 8
svn:date
V 27
2017-07-12T21:46:16.920507Z
K 7
svn:log
V 272
MF11: r320898; MFC: r320577, r320620

Retry up to 2 ms to enable bus power as at least with some Intel
SDHCI/eMMC controllers the first attempt after a D3 to D0 transition,
i. e. when the firmware has put the devices into D3 state before,
can fail.

Approved by:	re (gjb)

END