K 10
svn:author
V 3
ian
K 8
svn:date
V 27
2017-10-28T17:30:49.284213Z
K 7
svn:log
V 535
Avoid AXI bus issues due to a MAC reset on imx6sx and imx7.

When the FEC is connected to the AXI bus (indicated by AVB flag), a
MAC reset while a bus transaction is pending can hang the bus.
Instead of resetting, turn off the ENABLE bit, which allows the
hardware to complete any in-progress transfers (appending a bad CRC
to any partial packet) and release the AXI bus.  This could probably
be done unconditionally for all hardware variants, but that hasn't
been tested.

PR:		222634
Submitted by:	sebastian.huber@embedded-brains.de

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