K 10
svn:author
V 3
alc
K 8
svn:date
V 27
2019-08-02T22:36:42.754227Z
K 7
svn:log
V 515
Because of AArch64's weak memory consistency model, we need to include a
memory barrier between the stores for initializing a page table page and
the store for adding that page to the page table.  Otherwise, a page table
walk by another processor's MMU could see the page table page before it
sees the initialized entries.

Simplify pmap_growkernel().  In particular, eliminate an unnecessary TLB
invalidation.

Reviewed by:	andrew, markj
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D21126

END