K 10
svn:author
V 4
manu
K 8
svn:date
V 27
2019-08-07T18:35:59.579972Z
K 7
svn:log
V 1424
MFC r341404-r341405, r344699, r347024, r347442

r341404 by andreast:
Add rule to build the dtb for the rock64 board.

Reviewed by:	manu@

r341405 by andreast:
Build the dtb for the rock64 board.

Reviewed by:	manu@

r344699:
arm64: rockchip: rk3399_pll: Fix the recalc function

The plls frequency are now correctly calculated in fractional mode
and integer mode.
While here add some debug printfs (disabled by default)
Tested with powerd on the little cluster on a RockPro64.

r347024:
dtb: Include RK3399 RockPro64 DTS in kernel build

The DTS for this board is already present in sys/gnu/dts/arm64/rockchip/
and just needs to be enabled.

Submitted by:	alex@wied.io
Differential Revision:	https://reviews.freebsd.org/D19823

r347442:
arm64: rockchip: Don't always put PLL to normal mode

We used to put every PLL in normal mode (meaning that the output would
be the result of the PLL configuration) instead of slow mode (the output
is equal to the external oscillator frequency, 24-26Mhz) but this doesn't
work for most of the PLLs as when we put them into normal mode the registers
configuring the output frequency haven't been set.
Add a normal_mode member in clk_pll_def/clk_pll_sc struct and if it's true
we then set the PLL to normal mode.
For now only set it to the LPLL and BPLL (Little cluster PLL and Big cluster
PLL respectively).

Reviewed by:	ganbold
Differential Revision:	https://reviews.freebsd.org/D20174

END