K 10
svn:author
V 4
mmel
K 8
svn:date
V 27
2020-06-11T12:53:22.002724Z
K 7
svn:log
V 178
Fix grabbing of tegra uart.
An attempt to write to FCR register may corrupt transmit FIFO,
so we should wait for the FIFO to be empty before we can modify it.

MFC after:	1 week

END