K 10
svn:author
V 4
mmel
K 8
svn:date
V 27
2020-09-20T17:28:24.186719Z
K 7
svn:log
V 151
Adjust DMA alignment for USB stack.
It should be at least as large as the maximum value of caheline size
for currently known CPUs.

MFC after:	2 weeks

END