K 10
svn:author
V 6
andrew
K 8
svn:date
V 27
2020-09-24T07:13:13.632212Z
K 7
svn:log
V 286
Ensure we always align and size arm64 busdma allocations to a cacheline

This will ensure nothing modifies the cacheline while DMA is in progress
so we won't need to bounce the data.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26495

END