K 10
svn:author
V 8
kbowling
K 8
svn:date
V 27
2021-09-24T01:43:39.896807Z
K 7
svn:log
V 526
e1000: expose FEXTNVM registers and masks

Adding defines for FEXTNVM8 and FEXTNVM12 registers with new masks for
future use.

Signed-off-by: Nir Efrati <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>

Approved by:	imp
Obtained from:	DPDK (6d208ec099cd870a73c6b444b350a82c7a26c5e4)
MFC after:	1 week

(cherry picked from commit de965d042fa4d341cec3fa7cacac0f30f224bde4)

Git Hash:   f0413f8ec9ba50c9f8d4299ecd6c442a5d810c5e
Git Author: guinanx.sun@intel.com
END