K 10
svn:author
V 3
imp
K 8
svn:date
V 27
2001-08-21T20:04:42.000000Z
K 7
svn:log
V 172
Rearrange how we do interrupt routing tweaking.  We now have
	hw.pcic.intr_path	{1,2}	1 == ISA, 2 == PCI
	hw.pcic.init_route	Force TI chipset initializations in edge case.

END